industrial temperature range IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs 1 september 2002 IDT74AUC16240 industrial temperature range 1.8v cmos 16-bit buffer/ driver with inverted 3-state outputs description: this 16-bit buffer/driver is built using advanced cmos technology. the auc16240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented recievers and transmitters. the device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. it provides inverted outputs and symmetrical active-low output- enable ( oe ) inputs. this device is fully specified for partial power-down applications using i off . the i off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. to ensure the high-impedance state during power up or power down, oe should be tied to v dd through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. the idt logo is a registered trademark of integrated device technology, inc. ? 2002 integrated device technology, inc. dsc-6166/2 features: ? esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) ? 1.8v optimized ? 0.8v to 2.7v operating range ? inputs/outputs tolerant up to 3.6v ? 9ma @ 2.3v output drivers ? supports hot insertion ? available in tssop, tvsop, and vfbga packages functional block diagram applications: ? high performance, low voltage communications systems ? high performance, low voltage computing systems 3 oe 3 a 1 3 a 2 3 a 3 3 a 4 3 y 1 3 y 2 3 y 3 3 y 4 1 y 1 1 y 2 1 y 3 1 y 4 1 a 1 1 a 2 1 a 3 1 a 4 1 oe 4 oe 4 a 1 4 a 2 4 a 3 4 a 4 4 y 1 4 y 2 4 y 3 4 y 4 2 oe 2 a 1 2 a 2 2 a 3 2 a 4 2 y 1 2 y 2 2 y 3 2 y 4
industrial temperature range 2 IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs pinout configuration a 2oe nc nc nc nc 1oe b 1a2 1a1 gnd gnd 1y1 1y2 c 1a4 1a3 v dd v dd 1y3 1y4 e 2a4 2a3 2y3 2y4 f 3a1 3a2 3y2 3y1 g 3a3 3a4 gnd gnd 3y4 3y3 h 4a1 4a2 v dd v dd 4y2 4y1 j 4a3 4a4 gnd gnd 4y4 4y3 k 3oe 4oe nc nc nc nc d 2a2 2a1 gnd gnd 2y1 2y2 6 5 4 3 2 1 56 ball vfbga package layout vfbga top view note: nc = no internal connection 6 5 4 3 2 1 abcdefghjk
industrial temperature range IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs 3 tssop/ tvsop top view pin configuration symbol description max unit v term terminal voltage with respect to gnd ?0.5 to +3.6 v (all input and v dd terminals) v term terminal voltage with respect to gnd ?0.5 to +3.6 v (any i/o or output terminals in high- impedance or power-off state) v term terminal voltage with respect to gnd ?0.5 to +3.6 v (any i/o or output terminals in high or low state) t stg storage temperature ?65 to +150 c i out continuous dc output current 20 ma i ik continuous clamp current, 50 ma v i < 0, or v i > v dd i ok continuous clamp current, v o < 0 ?50 ma i dd continuous current through 100 ma i ss each v dd or gnd absolute maximum ratings (1) (1) (1) (1) (1) note: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. symbol parameter conditions typ. max. unit c in (1) input capacitance v in = 0v 3 4 pf c out (2) output capacitance v out = 0v 5.5 6 pf c i (3) input port capacitance v in = 0v 3 4 pf capacitance (t a = +25c, f = 1.0mhz, v dd = 2.5v) notes: 1. applies to control inputs. 2. applies to data outputs. 3. applies to data inputs. function table (each 4-bit buffer) (1) note: 1. h = high voltage level l = low voltage level x = don't care z = high-impedance inputs output x oe xax x y x lhl llh hxz pin description pin names description x oe 3-state output enable inputs (active low) x a x data inputs x y x 3-state outputs 1 oe 1 y 1 1 y 2 gnd 1 y 3 1 y 4 v dd 2 y 1 2 y 2 gnd 2 y 3 2 y 4 3 y 1 3 y 2 3 y 4 4 oe gnd v dd 4 y 1 4 y 2 gnd 4 y 3 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 40 41 42 43 44 45 46 47 48 1 2 oe 1 a 1 1 a 2 gnd 1 a 3 1 a 4 v dd 2 a 1 2 a 2 2 a 3 2 a 4 3 a 1 gnd 3 a 3 3 a 4 4 a 1 4 a 2 gnd 4 a 3 4 a 4 3 oe 3 y 3 4 y 4 v dd 3 a 2 gnd
industrial temperature range 4 IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs symbol parameter test conditions min. max. unit v dd supply voltage 0.8 2.7 v v dd = 0.8v v dd ? v dd = 1.1v to 1.3v 0.65 x v dd ? v ih input high voltage level v dd = 1.4v to 1.6v 0.65 x v dd ?v v dd = 1.65v to 1.95v 0.65 x v dd ? v dd = 2.3v to 2.7v 1.7 ? v dd = 0.8v ? 0 v dd = 1.1v to 1.3v ? 0.35 x v dd v il input low voltage level v dd = 1.4v to 1.6v ? 0.35 x v dd v v dd = 1.65v to 1.95v ? 0.35 x v dd v dd = 2.3v to 2.7v ? 0.7 v i input voltage 0 2.7 v v o output voltage active state 0 v dd v 3-state 0 2.7 v dd = 0.8v ? ?0.7 v dd = 1.1v ? ?3 i oh high level output current v dd = 1.4v ? ?5 ma v dd = 1.65v ? ?8 v dd = 2.3v ? ?9 v dd = 0.8v ? 0.7 v dd = 1.1v ? 3 i ol low level output current v dd = 1.4v ? 5 ma v dd = 1.65v ? 8 v dd = 2.3v ? 9 v dd = 0.8v to 1.3v ? 20 ? t/ ? v input transition rise or fall rate v dd = 1.6v to 1.95v ? 10 ns/v v dd = 2.7v ? 5 t a operating free-air temperature ?40 +85 c recommended operating characteristics (1) note: 1. all unused inputs of the device must be held at v dd or gnd to ensure proper operation. symbol parameter test conditions min. typ. max. unit i ih input high or low current v dd = 2.7v, v i = v dd or gnd ? ? 5 a i il all inputs i off input/output power off leakage v dd = 0v, v in or v o 2.7v ? ? 10 a i ozh high impedance output current v dd = 2.7v v o = v dd ? ? 10 a i ozl (3-state output pins) v o = gnd ? ? 10 i ddl quiescent power supply current v dd = 0.8v to 2.7v ? ? 20 a i ddh v in = gnd or v dd i ddz dc electrical characteristics over operating range (1) following conditions apply unless otherwise specified: operating conditions: t a = ?40c to +85c note: 1. all unused inputs of the device must be held at v dd or gnd to ensure proper operation.
industrial temperature range IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs 5 symbol parameter test conditions (1) min. typ. max. unit v oh output high voltage v dd = 0.8v - 2.7v i oh = ?100 av dd - 0.1 ? ? v dd = 0.8v i oh = ?0.7ma ? 0.55 ? v dd = 1.1v (2) i oh = ?3ma 0.8 ? ? v v dd = 1.4v (3) i oh = ?5ma 1 ? ? v dd = 1.65v (4) i oh = ?8ma 1.2 ? ? v dd = 2.3v (5) i oh = ?9ma 1.8 ? ? v ol output low voltage v dd = 0.8v - 2.7v i oh = 100 a ? ? 0.2 v dd = 0.8v i ol = 0.7ma ? 0.25 ? v dd = 1.1v (2) i ol = 3ma ? ? 0.3 v v dd = 1.4v (3) i ol = 5ma ? ? 0.4 v dd = 1.65v (4) i ol = 8ma ? ? 0.45 v dd = 2.3v (5) i oh = 9ma ? ? 0.6 output drive characteristics notes: 1. v il and v ih must be within the min. or max. range shown in the dc electrical characteristics table for the appropriate v dd range. t a = -40c to +85c. 2. demonstrates operation for nominal v dd = 1.2v. 3. demonstrates operation for nominal v dd = 1.5v. 4. demonstrates operation for nominal v dd = 1.8v. 5. demonstrates operation for nominal v dd = 2.5v. switching characteristics (1) note: 1. see test circuits and waveforms. t a = -40c to +85c. v dd = 0.8v v dd = 1.2v0.1v v dd = 1.5v0.1v v dd = 1.8v0.15v v dd = 2.5v0.2v symbol parameter typ. min. max. min. max. min. typ. max. min. max. unit t plh propagation delay 5.9 0.9 2.6 0.7 1.8 0.6 1.4 2 0.4 1.6 ns t phl xax to x y x t pzh output enable time 7.9 1.2 3.8 0.8 2.5 0.7 1.5 2.5 0.7 2 ns t pzl x oe to x y x t phz output disable time 9.3 2.1 6 1.5 4.8 1.8 2.7 4.5 0.6 2.3 ns t plz x oe to x y x operating characteristics, t a = 25c symbol parameter test conditions v dd = 0.8v v dd = 1.2v v dd = 1.5v v dd = 1.8v v dd = 2.5v unit c pd power dissipation capacitance c l = 0pf 24 24 25 26 30 pf outputs enabled f = 10mhz c pd power dissipation capacitance 2 2 2 3 4 pf outputs disabled
industrial temperature range 6 IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs open v load gnd v dd pulse generator d.u.t. r l c l r t v in v out (1) same phase input transition opposite phase input transition 0v 0v v oh v ol t plh t phl t phl t plh output v dd v t v t v dd v t control input t plz 0v output normally low t pzh 0v switch closed output normally high enable disable switch open t phz 0v v ol + v lz v oh v t v t t pzl v load/2 v load/2 v dd v t v ol v oh - v hz r l test circuits and waveforms propagation delay test circuits for all outputs enable and disable times note: 1. diagram shown for input control enable-low and input control disable-high. definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. test switch open drain disable low v load enable low disable high gnd enable high all other tests open switch position test conditions (1) symbol v dd = 0.8v v dd = 1.2v0.1v v dd = 1.5v0.1v v dd = 1.8v0.15v v dd = 2.5v0.2v unit v load 2xv dd 2xv dd 2xv dd 2xv dd 2xv dd v v t v dd /2 v dd /2 v dd /2 v dd /2 v dd /2 v v lz 100 100 100 150 150 mv v hz 100 100 100 150 150 mv r l 22210.5k ? c l 15 15 15 30 30 pf note: 1. pulse generator for all pulses: rate 10mhz; slew rate 1v/ns.
industrial temperature range IDT74AUC16240 1.8v cmos 16-bit buffer/driver with inverted 3-state outputs 7 ordering information corporate headquarters for sales: for tech support: 2975 stender way 800-345-7015 or 408-727-6116 logichelp@idt.com santa clara, ca 95054 fax: 408-492-8674 (408) 654-6459 www.idt.com idt xx auc xxx xx package device type temp. range bv pa pf 16 74 very fine pitch ball grid array thin shrink small outline package thin very small outline package 16-bit buffer/driver with inverted 3-state outputs ? 40c to +85c xx family 240 double-density x bus- hold blank no bus-hold xx grade i industrial temperature range
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